Types of Companding

Digital Companding

Digital Companding involves compression in the transmitter after the input sample has been converted to a linear PCM code and then expansion in the receiver prior to PCM decoding. Digitally compressed PCM codes use a 12 –bit linear PCM code and convert into 8-bit Compressed PCM Code.

    Digitally Companded PCM System 

Algorithm for 12-bit to 8-bit Digital Compression

The 8-bit compressed code consist of sign bit, three bit segment identifier and 4-bit magnitude code that specifies the Quantization interval.

                                  

8-bit μ-255 compressed code format

As shown in table below, bit positions designated with X are truncated during compression and subsequently lost. Bits Designated as A,B,C,D are transmitted as it is and its value ranges from (0000-1111). The sign bit is also transmitted as it is.

Algorithm for Encoder

1. The analog signal is sampled and converted to linear 12-bit Sign Magnitude code.

2. Sign bit is transmitted directly as it is to 8 bit compressed code.

       12-bit to 8-bit Digital Companding μ-255 Encoding and Decoding Table

3. Segment number in the 8-bit code is determined by number of 0’s in the 12-bit code.

4. Subtract number of 0’s in 12-bit code from 7 that is the segment number of 8-bit code and converted it into three bit binary number. eg. As shown in table if there are four 0’s in the 12-bit code(s0000ABCDXX)  then (7-4)=3 that is the segment number of 8-bit code and binary equivalent of 3 is 011 so 8 bit code is s011ABCD.

5. Bits Designated as A,B,C,D are transmitted as it is and its value ranges from (0000-1111). These bits represent Quantization interval.

Algorithm for Decoder

Here we have to expand code from 8-bit to 12-bit.

1. The most significant bit of the truncated bit is reinserted as logic 1.

2. Remaining truncated bits are reinserted as logic 0.

3. Suppose we have code (s100ABCD), transmit sign bit and (A,B,C,D) bits as it is, now segment bit is 100 whose decimal equivalent is 4. Now subtract (7-4) that is 3, so insert three 0’s after sign bit and in truncated bits insert 1 for most significant truncated bit and 0 for the rest truncated bits.

Every function performed by PCM encoder and Decoder is accomplished with single integrated chip known as codec. It includes antialiasing filter, sample and Hold circuit and A-D converter in transmitter section and D-A converter, a Hold circuit and bandpass filter in the receiver section.

Analog Companding

Analog Compression is implemented using specially designed diodes inserted in the analog path in a PCM transmitter prior to Sample and Hold Circuit. Analog expansion is also implemented using diodes that are placed just after low pass filter in PCM receiver.

 PCM System with Analog Companding

Figure shows the basic process of analog companding. In the transmitter, the dynamic range of analog signal is compressed, sampled and then converted to linear PCM code. In the receiver, PCM code is converted to PAM signal, filtered and then expanded back to original dynamic range.

μ-Law Companding

In USA and Japan, μ law companding is used. The compression characteristics for μ-law is

V_max = Maximum uncompressed analog input amplitude

V_in = Amplitude of input signal at particular instant of time

μ = Parameter used to define the amount of compression

V_out = Compressed output amplitude (volts)

The diagram shows μ- law compression characteristics. It shows compression curves for several values of μ. Higher the μ, more the compression. For μ = 0, the curve is linear (no compression). In recent PCM system, it uses 8-bit PCM code and μ=255.

 μ-Law Compression Characteristics

A-Law Companding

In Europe, the ITU-T has established, A-law companding to be used to approximate true logarithmic companding. For an intended dynamic range, A-Law companding has slightly flatter SQR than μ-Law. A-Law companding is inferior to μ-Law in terms of small signal quality (ideal channel noise). The compression Characteristics A-Law companding is